Integrated Circuits

An integrated circuit (IC), or chip, is a complete circuit of transistors, resistors and other parts built together on one small piece of silicon and sealed in a package with metal pins. This article explains what is inside a chip and how it is made, the common package shapes and how their pins are numbered, how to read the markings and the datasheet, and two classic first chips: the 555 timer and the operational amplifier.

About the analogies. Everyday comparisons appear only in shaded "Analogy" boxes, and each says where it stops working.

Static can kill chips. A static spark far too small to feel can damage an IC. Section 14 explains simple habits that prevent it.

1. A short recap

2. What an integrated circuit is

Before ICs, every transistor, resistor and capacitor was a separate discrete component, wired to the others by hand. An IC builds them all at once, side by side in a single slice of silicon, with their connections made from thin metal layers on top. That finished piece of patterned silicon is called the die.[1]

A die is far too small and fragile to solder to, so it is sealed in a package, usually black plastic, and fine wires join pads on the die to the package's metal pins or pads.[1] The black "chip" you see on a circuit board is the package; the circuit itself is the die inside (Figure 1).

Building parts together makes circuits tiny, cheap and reliable: the connections are made in the factory, not by hand, and parts made side by side match each other closely. One chip can hold anything from four logic gates to a whole computer processor.[1]

A short history

On 12 September 1958, Jack Kilby of Texas Instruments demonstrated a working oscillator whose transistor, capacitor and resistors were all formed in germanium, joined by fine gold wires.[2] In 1959 Robert Noyce of Fairchild Semiconductor patented the more practical approach: make the parts in silicon, cover them with a protective layer of silicon oxide, and connect them with metal lines laid on top of the oxide. Fairchild produced the first working ICs of this kind in 1960, and that planar method is still the basis of chipmaking today.[3]​[4]

In 1965 Gordon Moore noticed that the number of components per chip was doubling every year; in 1975 he revised the rate to a doubling every two years. The prediction became known as Moore's law.[5] Intel's 4004, one of the first microprocessors (a computer's processing unit on one chip), held 2,300 transistors in 1971.[6] Apple's A16 phone chip holds 16 billion.[7]

3. How a chip is made

Chips are made on a wafer, a thin disk sliced from a large crystal of very pure silicon and polished extremely smooth; the most common size is 300 mm across. Each wafer carries many copies of the same chip, from a few dozen to thousands, built up together in layers.[7] ASML, which makes the machines that print the patterns, describes the key steps like this:[7]

  1. Deposition. A thin film of conducting, insulating or semiconducting material is laid over the whole wafer.
  2. Photoresist. The wafer is coated with photoresist, a light-sensitive coating.
  3. Lithography. Ultraviolet light shines through a reticle, a master plate carrying the pattern for one layer, and lenses or mirrors shrink that pattern onto the resist. Where light lands, the resist changes chemically.
  4. Etch. The changed resist is washed away, and the exposed material underneath is removed by chemicals or gases, leaving the pattern.
  5. Ion implantation. Charged atoms are fired into the exposed silicon to dope it, which is how the n-type and p-type regions of transistors are made.
  6. Repeat, then package. The cycle repeats for each layer. The finished wafer is tested, sawn into individual dies with a diamond saw, and each good die is packaged.

The whole process takes thousands of steps and more than three months.[7] Figure 2 shows the result, much simplified: transistors at the bottom, in the silicon itself, and layers of metal wiring above them, separated by insulating glass-like layers. Advanced chips have a single layer of transistors wired together by more than a dozen layers of metal.[8]

From wafer to packaged chip Three steps from left to right. 1: a round silicon wafer covered in a grid of identical square dies, one highlighted. An arrow labeled saw leads to 2: a single enlarged die, with a grid of circuitry in the middle and small bond pads around its edge. An arrow labeled package leads to 3: a cutaway of a plastic chip package with pins on two sides; the die sits in the middle and thin bond wires run from its pads to the inner ends of the pins. Labels mark the die, bond wires, plastic and pins. wafer: many identical dies 1. Build saw 2. Die circuit in the middle, bond pads round the edge package 3. Packaged chip (cutaway) die glued in, wires to the pins, then sealed in plastic die bond wires plastic pins
Figure 1. From wafer to chip. Many identical dies are built on one wafer, which is then sawn apart; each good die is glued into a package and wired to its pins. Not to scale.

Analogy: printing with a stencil. Lithography works a little like spray-painting through a stencil: the reticle decides where the light falls, and only those places are changed. Repeating it with different stencils builds up a design layer by layer.

Where it breaks down: A chip's features are far smaller than the wavelength of ordinary light, the "paint" is a chemical change in the resist rather than paint, and every layer must line up almost perfectly with the ones below.

Simplified cross-section of an integrated circuit A slice through a chip. At the bottom is the silicon wafer. Four doped regions are set into its top surface, in two pairs; above the gap in each pair sits a transistor gate, making two transistors. Above the silicon is a thick band of insulating layers containing metal: short vertical contacts rise from the doped regions to a first metal layer, and further vias connect to a second metal wiring layer and an upper metal layer, joining the two transistors. Labels on the right name each layer. silicon wafer (substrate) upper metal layer metal wiring layer insulating layers first metal layer contacts (vias) transistor gate doped regions Two transistors in the silicon, wired together above transistor 1 transistor 2
Figure 2. A simplified slice through a chip: doped regions and transistor gates in the silicon, with insulated metal wiring layers above. Real chips can have more than a dozen metal layers. Simplified; not to scale.

You will often see chips described by a process node, such as "7 nm" or "5 nm". These names once matched the size of a transistor feature, but they stopped doing so in the 1990s; today they are labels for a manufacturing generation, not a measurement.[8] (A nanometer, nm, is a billionth of a meter.)

4. Packages

Packages come in two mounting styles. Through-hole packages have legs that pass through holes in the circuit board and are soldered on the other side; they are larger and easy to handle. Surface-mount packages (SMD, for surface-mount device) sit on copper pads on one side of the board and are soldered there.[1] The common shapes are (Figure 3):

Many simple chips come in several packages. TI sells the same 74HC00 logic chip as a 14-pin DIP (19.3 mm long) and as a 14-pin SOIC (8.7 mm) or TSSOP (5.0 mm), among others.[12] Some ICs use packages you have met before: the 7805 regulator comes in the three-legged TO-220 (recap), and tiny chips use transistor-style packages such as SOT-23 (recap).

Common integrated circuit packages Five dark chip packages in a row, not to scale. DIP-8, top view: a rectangular body with a notch at the left end, a pin-1 dot and four legs on each long side; through-hole, pitch 2.54 millimeters. SOIC-8, top view: a smaller body with short legs on two sides and a pin-1 dot; surface mount, pitch 1.27 millimeters. QFP-32, top view: a square body with eight short legs on each of its four sides and a pin-1 dot; pitch 0.4 to 1 millimeter. QFN-24, bottom view: a square body with six small pads along each edge and a large exposed pad in the middle; no legs. BGA, bottom view: a square body covered by an eight by eight grid of solder balls. DIP-8 through-hole pitch 2.54 mm top SOIC-8 surface mount pitch 1.27 mm top QFP-32 surface mount pitch 0.4 to 1 mm top exposed pad QFN-24 pads underneath no legs bottom BGA solder balls underneath bottom Through-hole on the left; surface mount, smaller and denser, to the right
Figure 3. Common IC packages: DIP and SOIC (top views), QFP (top view), and QFN and BGA (bottom views, showing the pads and balls). Typical pin spacings are given beneath. Not to scale.

5. Pin numbering

Every pin of an IC has its own job, so you must know which is which. Packages mark pin 1 with a notch at one end, a small dot or dimple beside pin 1, or both. Looking down on the top of the chip, the pin numbers then count up counterclockwise around the package.[1] On an 8-pin DIP with the notch at the left, pin 1 is bottom left, pins 1 to 4 run left to right along the bottom, and pins 5 to 8 come back right to left along the top (Figure 4). The same counterclockwise rule applies to SOIC, QFP and QFN packages.

Datasheet pinouts are drawn as a "top view". Seen from the underside of a board, the pattern is mirrored, a common source of mistakes.

BGA balls use a grid instead. Rows are lettered and columns numbered, so each ball has a name such as A1 or C7, and the A1 corner is marked on the package. Letters that are easy to confuse with numbers, such as I, O, Q, S, X and Z, are skipped.[13]

How IC pins are numbered Left: an 8-pin DIP seen from above, with its notch at the left end and a pin-1 dot in the lower left corner. Pins 1 to 4 run left to right along the bottom edge and pins 5 to 8 run right to left along the top edge; a curved arrow around the chip shows the counterclockwise order. Each pin is labeled with its NE555 function: 1 GND, 2 TRIG, 3 OUT, 4 RESET, 5 CONT, 6 THRES, 7 DISCH, 8 VCC. Right: the ball side of a BGA with a six by six grid of balls. Rows are lettered A to F from the bottom up and columns numbered 1 to 6 from the left; a triangle marks the A1 corner at the bottom left. 1 GND 8 VCC 2 TRIG 7 DISCH 3 OUT 6 THRES 4 RESET 5 CONT notch end pin-1 dot counter- clockwise 8-pin DIP from above (NE555 pin names) A B C D E F 1 2 3 4 5 6 A1 mark BGA, ball side A1 corner marked; rows lettered, columns numbered (A1, C4, F6...)
Figure 4. Finding pin 1. Left: an 8-pin DIP from above, numbered counterclockwise from the notch, with the NE555 timer's pin names. Right: BGA balls are named by row letter and column number from the marked A1 corner. Pin names after TI's NE555 data sheet.

6. Units and markings

The writing on a chip is mostly a part number. Take TI's SN74HC00N (Figure 5):[12]

Chips may also carry a maker's logo and a lot or date code that traces the production batch.[12] The "74" numbering goes back to TI's 7400 series of logic chips, launched in plastic packages in 1966, which soon won over half of the logic market.[14] The numbering is still used today.

Decoding the part number SN74HC00N A dark 14-pin DIP chip with a notch at the left, marked in light letters SN74HC00N, split into five groups. Brackets beneath each group lead to explanations: SN, TI prefix; 74, minus 40 to 85 degrees Celsius, where 54 means minus 55 to 125; HC, logic family, CMOS, 2 to 6 volts; 00, function, four 2-input NAND gates; N, package, 14-pin DIP. A note says the SOIC version is marked just HC00. SN 74 HC 00 N SN TI prefix 74 −40 to 85 °C (54 = −55 to 125) HC logic family (CMOS, 2 to 6 V) 00 function: four 2-input NAND gates N package: 14-pin DIP SN74HC00N, top marking The SOIC version is marked just "HC00".
Figure 5. Reading a part number: SN74HC00N decoded. Marking and ordering details from TI's SN74HC00 data sheet.

ICs have no unit of their own, the way resistors have ohms. Datasheets use the familiar units: volts for supplies, milliamps (mA) or microamps (µA) for currents, nanoseconds (ns) for timing, and degrees Celsius. Packages are named by type and pin count, such as "SOIC-8".

7. Common types: analog, digital and mixed-signal

Analog ICs handle signals that can take any value within a range, such as the voltage from a microphone or a temperature sensor. Amplifiers, comparators, timers and voltage regulators are analog chips.[1]

Digital ICs handle signals that are treated as just two states, high (1) and low (0). Logic gates, counters, memory, microcontrollers and processors are digital.[1] Most digital chips today use CMOS (complementary metal-oxide-semiconductor) circuits, built from pairs of MOSFETs: a p-channel transistor that connects the output to the supply and an n-channel one that connects it to ground. Only one is on at a time, so in a steady state almost no current flows.[15]

"High" and "low" are ranges, not exact voltages. With a 4.5 V supply, a 74HC00 input counts anything below 1.35 V as low and anything above 3.15 V as high; in between, the result is not guaranteed (Figure 6).[12] Each gate takes typically 9 ns to respond at that supply.[12]

Logic levels for a 74HC00 input A vertical voltage scale from 0 to 4.5 volts divided into three bands. From 0 to 1.35 volts: LOW, logic 0. From 1.35 to 3.15 volts: undefined, avoid, the result is not guaranteed. From 3.15 to 4.5 volts: HIGH, logic 1. The top of the scale is the 4.5 volt supply and the bottom is ground. 0 V 1.35 V 3.15 V 4.5 V LOW (0) input below 1.35 V undefined avoid: result not guaranteed HIGH (1) input above 3.15 V input voltage 74HC00 input, 4.5 V supply supply (4.5 V) ground
Figure 6. Logic levels for a 74HC00 input at a 4.5 V supply. Inputs must be firmly below 1.35 V or above 3.15 V; the band between is undefined. Values from TI's SN74HC00 data sheet.

Mixed-signal ICs contain both. The RP2040 microcontroller on the Raspberry Pi Pico is mainly digital, with two processor cores and 264 kB of memory, but it also has an analog-to-digital converter (ADC), which measures a voltage on four of its pins and turns it into a 12-bit number.[10] Power ICs, such as regulators and motor drivers, mainly handle current rather than information.

8. How to read a datasheet

A datasheet is the maker's official, free document for a part: what it does, its limits, how to wire it and its packages. Read it before using any chip. Most follow a similar order (Figure 7); here is TI's NE555 datasheet:[16]

The usual sections of a datasheet A column of ten boxes in order from front to back of a datasheet, each with an arrow to a note. Features, applications, description: what it does and headline numbers. Pin configuration and functions: top-view pinout and what each pin does. Absolute maximum ratings, highlighted: never exceed, even briefly. ESD ratings: how much static the pins survive. Recommended operating conditions, highlighted: the range to design within. Electrical characteristics: minimum, typical and maximum under test conditions. Typical characteristics: graphs of behavior against voltage and temperature. Detailed description and application: how it works, formulas, example circuits. Power supply and layout: decoupling capacitors and board layout. Mechanical, packaging, ordering: dimensions, part numbers and markings. A key says to read the two highlighted sections before connecting anything. Features, applications, description what it does; headline numbers Pin configuration and functions top-view pinout; what each pin does Absolute maximum ratings never exceed, even briefly ESD ratings how much static the pins survive Recommended operating conditions the range to design within Electrical characteristics min / typ / max under test conditions Typical characteristics graphs: behavior vs voltage, temperature Detailed description, application how it works; formulas; example circuits Power supply and layout decoupling capacitors, board layout Mechanical, packaging, ordering dimensions, part numbers, markings A typical datasheet, front to back read these two before connecting anything
Figure 7. The usual parts of a datasheet in order, with what to look for in each. Section names follow TI's NE555 data sheet; other makers use similar headings.

Also check which variant and package each number applies to: one datasheet often covers several versions with different numbers.[16]​[17]

9. First example: the 555 timer

The 555 timer was designed by Hans Camenzind for Signetics and launched in 1971. His original design had 23 transistors, 16 resistors and 2 diodes, and the chip has ended up in kitchen appliances, toys and spacecraft.[18] It is still made by several companies and remains a favorite first IC.

Inside, the 555 has three main blocks (Figure 8):[16]

Pin 4, RESET, forces the output low, so tie it to the supply when unused. Pin 5, CONT, gives access to the two-thirds level.[16]

Block diagram of the 555 timer A large box represents the chip, with its eight pins around the edge. On the left, from the top: VCC pin 8, CONT pin 5, THRES pin 6, TRIG pin 2 and GND pin 1. On the right: RESET pin 4, OUT pin 3 and DISCH pin 7. Inside, a chain of three resistors runs from VCC down to ground, with taps at two-thirds and one-third of VCC; CONT connects to the two-thirds tap. The upper comparator compares THRES with the two-thirds level and drives the R input of a flip-flop; the lower comparator compares TRIG with the one-third level and drives the S input. RESET also goes to the flip-flop. The flip-flop drives an output stage to OUT, and the base of a discharge transistor whose collector is DISCH and whose emitter is ground. VCC 8 CONT 5 THRES 6 TRIG 2 GND 1 4 RESET 3 OUT 7 DISCH 2/3 VCC 1/3 VCC −+ +− comparator comparator flip- flop R S output stage discharge Inside the 555 (simplified)
Figure 8. Inside the 555: a divider sets references at 1/3 and 2/3 of the supply; two comparators set and reset a flip-flop that drives the output and the discharge transistor. Simplified, after TI's functional block diagram.

One-shot (monostable) mode

In monostable mode, a short low pulse on TRIG starts one timed output pulse. A capacitor C charges through a resistor RA until it reaches two-thirds of the supply, which ends the pulse. The pulse length is about

t = 1.1 × RA × C

so 100 kΩ and 10 µF give about 1.1 seconds (calculated). Because both the charging and the threshold scale with the supply, the time barely depends on the supply voltage.[16]

Oscillator (astable) mode

In astable mode the 555 triggers itself and runs continuously, making a square wave, a signal that switches between high and low. TRIG and THRES are joined to the capacitor, which charges through RA and RB and discharges through RB alone, swinging between one-third and two-thirds of the supply (Figure 9). TI gives:[16]

thigh ≈ 0.693 × (RA + RB) × C
tlow ≈ 0.693 × RB × C
f ≈ 1.44 ÷ ((RA + 2RB) × C)

Worked example: an LED blinker. With RA = 10 kΩ, RB = 68 kΩ and C = 10 µF (all calculated):

The high time is always longer than the low time here, because the capacitor charges through both resistors. An LED with its series resistor on pin 3 completes the blinker (recap). The timing capacitor's tolerance, which can be ±20%, limits accuracy (recap); for precise timing a crystal is used instead (article 21, Crystals and Oscillators).

The 555 timer as an oscillator Left: the astable circuit. From the positive supply, 5 to 15 volts, resistor RA of 10 kilohms runs down to a node connected to pin 7; resistor RB of 68 kilohms runs from there to a node connected to pins 6 and 2; capacitor C of 10 microfarads runs from that node to ground. Pins 8 and 4 connect to the supply, pin 1 to ground, and pin 3 is the output. Right: two graphs against time over about three seconds. The capacitor voltage rises in curved ramps from one-third to two-thirds of the supply and falls back again, repeatedly. Below it, the output is a square wave, high while the capacitor charges, for 0.54 seconds, and low while it discharges, for 0.47 seconds. +5 to 15 V RA 10 kΩ RB 68 kΩ C 10 µF 555 7 6, 2 8 4 1 out 3 VCC 2/3 1/3 capacitor voltage high low output (pin 3) high 0.54 s low 0.47 s About one cycle per second
Figure 9. The 555 as an oscillator. Left: the astable circuit with the worked-example values. Right: the capacitor voltage ramps between 1/3 and 2/3 of the supply while the output switches high and low. Circuit after TI's NE555 data sheet; waveform illustrative.

The original 555 is built from bipolar transistors (BJTs) and draws a few milliamps. CMOS versions such as TI's TLC555 share its pinout, run from 2 to 15 V and draw well under a milliamp, but their outputs supply much less current.[19]

10. Second example: the operational amplifier

An operational amplifier, or op-amp, is an amplifier with two inputs and one output. It amplifies the difference between the non-inverting input (marked +) and the inverting input (marked −), and its open-loop gain, the gain with nothing connected around it, is enormous.[20] TI's LM358B, a common dual op-amp (two in one 8-pin package), has a typical open-loop gain of 140 V/mV, meaning 140,000 times, and at least 70,000.[17] The name comes from the "operations", such as adding and scaling, that early op-amps performed in analog computers.[20]

As a comparator. With so much gain, a millivolt of difference drives the output fully high or low, so a bare op-amp tells you which input is higher, for example lighting an LED when a sensor voltage passes a set level.[20] Dedicated comparator chips such as the LM393 are designed for this job; the LM393's output is open-collector, which means it can only pull down, so it needs a pull-up resistor to a supply.[21]

With negative feedback. Connect part of the output back to the inverting input, and the op-amp settles where its two inputs are almost exactly equal. Two simple rules then describe the circuit: the inputs draw almost no current, and the output does whatever it must to keep the two inputs at the same voltage.[20] Resistors, not the chip, then set the gain (Figure 10):

Operational amplifier symbol and two basic amplifiers Left: the op-amp symbol, a triangle pointing right, with the inverting input marked minus and the non-inverting input marked plus on the left, the output at the right point, and supply connections plus V at the top and minus V or ground at the bottom. Middle: a non-inverting amplifier. The input goes to the plus input; resistor R2, 100 kilohms, runs from the output back to the minus input, and R1, 10 kilohms, runs from the minus input to ground; gain equals 1 plus R2 over R1, which is 11. Right: an inverting amplifier. The input passes through RI, 10 kilohms, to the minus input; RF, 36 kilohms, runs from the output back to the minus input, and the plus input is grounded; gain equals minus RF over RI, which is minus 3.6. −+ inverting (−) non-inverting (+) output +V −V or ground Symbol +− in R1 10 kΩ R2 100 kΩ out Non-inverting: gain = 1 + R2/R1 = 11 −+ in RI 10 kΩ RF 36 kΩ out Inverting: gain = −RF/RI = −3.6
Figure 10. Op-amp basics. Left: the symbol. Middle: a non-inverting amplifier with gain 1 + R2/R1 = 11. Right: an inverting amplifier with gain −RF/RI = −3.6. Power pins are omitted, as is usual. After Kuphaldt and TI's LM358 data sheet.

Analogy: steering to a line. A driver watching the lane line corrects the wheel whenever the car drifts, so the car follows the line rather than wherever the steering happens to point. Negative feedback makes an op-amp follow its resistor network in the same way.

Where it breaks down: The op-amp corrects electrically within microseconds, not by judgment, and it can only correct within its supply limits: once the output hits its limit, it stops following.

Real limits. An LM358B's output stops about 1.4 V below its positive supply, so on 5 V it tops out near 3.6 V; the gain-of-11 amplifier above would clip (flatten) for inputs above about 0.33 V (calculated). Its inputs work down to the negative supply but only up to 2 V below the positive one.[17] Rail-to-rail op-amps get closer to the supplies. Speed is limited too: the LM358B's gain falls to 1 at about 1.2 MHz.[17]

The LM358's pins are: pin 1 output A, pins 2 and 3 the − and + inputs of A, pin 4 ground or negative supply, pins 5 and 6 the + and − inputs of B, pin 7 output B, and pin 8 positive supply.[17] Many other dual op-amps share this pinout, but always check the datasheet.

11. How ICs behave in a circuit

12. Testing

13. Everyday uses

ASML counts about 1.15 trillion chips sold in 2021, about 145 for every person on Earth.[7] Phones and computers are full of processors, memory and power chips; less obvious ones run washing machines, refrigerators, air conditioners and phone chargers; TI lists all of those among the uses of the humble LM358.[17] Small microcontrollers such as the RP2040 run hobby projects and many gadgets (see Microcontrollers),[10] and sensor chips measure temperature, motion and light (article 18, Sensors).

14. Safety and handling

Most IC circuits run at low, safe voltages; the main danger is to the chip.

Electrostatic discharge (ESD). When two materials touch and separate, such as shoes on a floor, electrons move between them and leave a static charge, which can discharge through a chip's pins as a tiny spark. The EOS/ESD Association lists typical charges of 35,000 V from walking across carpet in dry air (10 to 25% relative humidity), falling to 1,500 V in humid air (65 to 90%).[23] Many components can be damaged below 100 V, and damage can be latent: the chip works for now but fails early.[23] Datasheets give an ESD rating from a standard human-body model test: ±500 V for the NE555 and ±2,000 V for the LM358B.[16]​[17] TI's note on that rating says 500 V allows safe manufacturing with a standard ESD control process, so the same care makes sense at home.[16]

Simple habits follow the ESD Association's principles of keeping everything at the same potential and letting charge drain away safely:[24]

Wrong way round or wrong voltage. A chip inserted backwards, or supplied above its absolute maximum rating, can be permanently damaged.[16] A damaged or reversed chip can also get hot. Check pin 1 before applying power, and if a chip gets hot or smells, disconnect power before touching it. Add fuses or other protection in projects that draw real current (article 17, Fuses and Circuit Protection).

Soldering and mains. Use a grounded soldering iron and let the chip cool before touching it. Projects that take power from the wall carry dangerous voltages before the low-voltage supply (recap).

The whole story in brief

Coming up in this section: 17 Fuses and Circuit Protection.

Sources

All links were checked in October 2026. External links open in a new tab.

  1. SparkFun Electronics, "Integrated Circuits" tutorial (dies, packages, pin numbering, common ICs): https://learn.sparkfun.com/tutorials/integrated-circuits/all
  2. Computer History Museum, The Silicon Engine, "1958: All Semiconductor 'Solid Circuit' is Demonstrated": https://www.computerhistory.org/siliconengine/all-semiconductor-solid-circuit-is-demonstrated/
  3. Computer History Museum, The Silicon Engine, "1959: Practical Monolithic Integrated Circuit Concept Patented": https://www.computerhistory.org/siliconengine/practical-monolithic-integrated-circuit-concept-patented/
  4. Computer History Museum, The Silicon Engine, "1960: First Planar Integrated Circuit is Fabricated": https://www.computerhistory.org/siliconengine/first-planar-integrated-circuit-is-fabricated/
  5. Computer History Museum, The Silicon Engine, "1965: 'Moore's Law' Predicts the Future of Integrated Circuits": https://www.computerhistory.org/siliconengine/moores-law-predicts-the-future-of-integrated-circuits/
  6. Computer History Museum, The Silicon Engine, "1971: Microprocessor Integrates CPU Function onto a Single Chip": https://www.computerhistory.org/siliconengine/microprocessor-integrates-cpu-function-onto-a-single-chip/
  7. ASML, "6 crucial steps in semiconductor manufacturing" (updated October 2023): https://www.asml.com/en/company/stories/2021/semiconductor-manufacturing-process-steps
  8. Samuel K. Moore, IEEE Spectrum, "A Better Way to Measure Progress in Semiconductors" (July 2020): https://spectrum.ieee.org/a-better-way-to-measure-progress-in-semiconductors
  9. Amkor Technology, "Micro LeadFrame (QFN)" package overview: https://amkor.com/packaging/leadframe/microleadframe/
  10. Raspberry Pi Ltd, RP2040 Datasheet (PDF): https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf
  11. Amkor Technology, "PBGA/TEPBGA (Plastic Ball Grid Array)" package overview: https://amkor.com/packaging/laminate/pbga/
  12. Texas Instruments, SN74HC00, SN54HC00 Quadruple 2-Input NAND Gates data sheet (SCLS181H, PDF): https://www.ti.com/lit/ds/symlink/sn74hc00.pdf
  13. JEITA EDR-7316C, "Design guide for semiconductor packages: Fine-pitch Ball Grid Array and Fine-pitch Land Grid Array (FBGA/FLGA)" (PDF): https://home.jeita.or.jp/tsc/std-pdf/EDR-7316C_E.pdf
  14. Computer History Museum, The Silicon Engine, "1963: Standard Logic IC Families Introduced": https://www.computerhistory.org/siliconengine/standard-logic-ic-families-introduced/
  15. Texas Instruments, "Implications of Slow or Floating CMOS Inputs" (SCBA004E, PDF): https://www.ti.com/lit/an/scba004e/scba004e.pdf
  16. Texas Instruments, NA555, NE555, SA555, SE555 xx555 Precision Timers data sheet (SLFS022K, revised March 2026, PDF): https://www.ti.com/lit/ds/symlink/ne555.pdf
  17. Texas Instruments, LMx58, LM2904 Industry-Standard Dual Operational Amplifiers data sheet (SLOS068AB, PDF): https://www.ti.com/lit/ds/symlink/lm358.pdf
  18. IEEE Spectrum, "Chip Hall of Fame: Signetics NE555": https://spectrum.ieee.org/chip-hall-of-fame-signetics-ne555
  19. Texas Instruments, TLC555 CMOS Timer data sheet (SLFS043K, PDF): https://www.ti.com/lit/ds/symlink/tlc555.pdf
  20. Tony R. Kuphaldt, Lessons In Electric Circuits, Volume III (Semiconductors), chapter 8, "Operational Amplifiers": https://www.ibiblio.org/kuphaldt/electricCircuits/Semi/SEMI_8.html
  21. Texas Instruments, LM393B, LM2903B, LM193, LM293, LM393 and LM2903 Dual Comparators data sheet (SLCS005AH, PDF): https://www.ti.com/lit/ds/symlink/lm393.pdf
  22. Texas Instruments, "Anti-counterfeit": https://www.ti.com/quality-reliability/quality/anti-counterfeit.html
  23. EOS/ESD Association, "ESD Fundamentals Part 1: An Introduction to ESD": https://www.esda.org/esd-overview/esd-fundamentals/part-1-an-introduction-to-esd/
  24. EOS/ESD Association, "ESD Fundamentals Part 2: Principles of ESD Control": https://www.esda.org/esd-overview/esd-fundamentals/part-2-principles-of-esd-control/